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    <title>EETOP 创芯网论坛 (原名：电子顶级开发网) - Sigrity仿真</title>
    <link>https://bbs.eetop.wang/forum-289-1.html</link>
    <description>Latest 20 threads of Sigrity仿真</description>
    <copyright>Copyright(C) EETOP 创芯网论坛 (原名：电子顶级开发网)</copyright>
    <generator>Discuz! Board by Comsenz Inc.</generator>
    <lastBuildDate>Fri, 05 Jun 2026 21:41:11 +0000</lastBuildDate>
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      <title>EETOP 创芯网论坛 (原名：电子顶级开发网)</title>
      <link>https://bbs.eetop.wang/</link>
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    <item>
      <title>专业SI/PI仿真外包</title>
      <link>https://bbs.eetop.wang/thread-994289-1-1.html</link>
      <description><![CDATA[专业SI/PI仿真外包：高速链路(DDR/PCIE/USB)、PDN阻抗优化、信号质量/时序分析、EMC风险评估。高效交付！私聊详询]]></description>
      <category>Sigrity仿真</category>
      <author>qsfei</author>
      <pubDate>Wed, 27 Aug 2025 08:03:01 +0000</pubDate>
    </item>
    <item>
      <title>信号完整性揭秘-于博士SI设计手记</title>
      <link>https://bbs.eetop.wang/thread-984893-1-1.html</link>
      <description><![CDATA[一本非常好的信号完整性的书]]></description>
      <category>Sigrity仿真</category>
      <author>Jimi414</author>
      <pubDate>Wed, 26 Feb 2025 03:52:26 +0000</pubDate>
    </item>
    <item>
      <title>基于HyperLynx 9.0的信号和电源完整性仿真分析</title>
      <link>https://bbs.eetop.wang/thread-984892-1-1.html</link>
      <description><![CDATA[基于HyperLynx 9.0的信号和电源完整性仿真分析]]></description>
      <category>Sigrity仿真</category>
      <author>Jimi414</author>
      <pubDate>Wed, 26 Feb 2025 03:48:55 +0000</pubDate>
    </item>
    <item>
      <title>《高速电路设计与仿真》</title>
      <link>https://bbs.eetop.wang/thread-984891-1-1.html</link>
      <description><![CDATA[分享一本仿真设计书本《高速电路设计与仿真》]]></description>
      <category>Sigrity仿真</category>
      <author>Jimi414</author>
      <pubDate>Wed, 26 Feb 2025 03:45:13 +0000</pubDate>
    </item>
    <item>
      <title>新手求助，T2B例程仿真</title>
      <link>https://bbs.eetop.wang/thread-976036-1-1.html</link>
      <description><![CDATA[大佬们求助一个问题。T2B 帮助文档是基于micron v69a ddr3进行的，这个hspice模型我在官网上没找到，只能下了一个v89c的去做.
文档中buffer上只有CKD这个信号，v89c中有这个CKD和CKDF时钟信号，请问这个在T2B file中应该怎么去定义呢？





 ...]]></description>
      <category>Sigrity仿真</category>
      <author>taylorzhx</author>
      <pubDate>Sat, 14 Sep 2024 03:24:39 +0000</pubDate>
    </item>
    <item>
      <title>求助 有大神可以提供下这本书的电子版吗？</title>
      <link>https://bbs.eetop.wang/thread-974649-1-1.html</link>
      <description><![CDATA[高速数字接口与光电测试,有大神可以提供下这本书的电子版吗？感谢感谢]]></description>
      <category>Sigrity仿真</category>
      <author>dgy_hy</author>
      <pubDate>Wed, 21 Aug 2024 00:40:58 +0000</pubDate>
    </item>
    <item>
      <title>关于t2b软件转ibis模型遇到的问题</title>
      <link>https://bbs.eetop.wang/thread-968846-1-1.html</link>
      <description><![CDATA[]]></description>
      <category>Sigrity仿真</category>
      <author>擎天柱</author>
      <pubDate>Wed, 08 May 2024 10:07:21 +0000</pubDate>
    </item>
    <item>
      <title>关于SIG23.10软件的热分析仿真</title>
      <link>https://bbs.eetop.wang/thread-967086-1-1.html</link>
      <description><![CDATA[有大佬知道为什么我用SIG进行热分析没有跑起来嘛？每个模块的温度都是我设置的环境温度25摄氏度，查看相关的error.log也只是显示一些warning。]]></description>
      <category>Sigrity仿真</category>
      <author>zhengcaiping</author>
      <pubDate>Wed, 10 Apr 2024 02:32:38 +0000</pubDate>
    </item>
    <item>
      <title>t2b转换出现branch current test错误</title>
      <link>https://bbs.eetop.wang/thread-966211-1-1.html</link>
      <description><![CDATA[使用t2b转换的时候出现branch current test 这个是什么原因导致的？
branch current test是通过什么抽取？

The spice netlist does not work properly
IOSE_RX failed on
-- branch current test]]></description>
      <category>Sigrity仿真</category>
      <author>edward_nb</author>
      <pubDate>Tue, 26 Mar 2024 06:07:03 +0000</pubDate>
    </item>
    <item>
      <title>PCIE3.0模型有吗</title>
      <link>https://bbs.eetop.wang/thread-959400-1-1.html</link>
      <description><![CDATA[哪个大侠可以提供一下，练练手]]></description>
      <category>Sigrity仿真</category>
      <author>狂羁青马</author>
      <pubDate>Wed, 15 Nov 2023 02:47:13 +0000</pubDate>
    </item>
    <item>
      <title>Sigrity powersi+systemsi仿真DDR4-2400MHZ</title>
      <link>https://bbs.eetop.wang/thread-957990-1-1.html</link>
      <description><![CDATA[1.jpg是cmd的波形，绿色是ck时钟,这个要怎么去判断是符合要求，使用模板AC/DC画出？怎么setup holdup和眼图判定
2.jpg是data的波形，这个要怎么去判断是符合要求，怎么setup holdup和眼图判定]]></description>
      <category>Sigrity仿真</category>
      <author>狂羁青马</author>
      <pubDate>Thu, 19 Oct 2023 10:47:09 +0000</pubDate>
    </item>
    <item>
      <title>请问使用t2b工具进行convert ibis model操作时如何设置可以加速转换？</title>
      <link>https://bbs.eetop.wang/thread-957304-1-1.html</link>
      <description><![CDATA[大家好，最近在进行ibis模型仿真，请问各位使用t2b工具进行convert ibis model操作时如何设置可以加速转换？我现在convert一个IOB标准需要好久的时间。如有知道的请帮忙解答一下，谢谢！

 ...]]></description>
      <category>Sigrity仿真</category>
      <author>f3736847009</author>
      <pubDate>Sun, 08 Oct 2023 13:01:07 +0000</pubDate>
    </item>
    <item>
      <title>Allegro 2022中Topology Workbench新建工程提示无效</title>
      <link>https://bbs.eetop.wang/thread-956434-1-1.html</link>
      <description><![CDATA[新建SystemSI工程，但是提示cannot be opened because it is not a valid topology workbench topology，哪位大佬遇到过，怎么解决啊]]></description>
      <category>Sigrity仿真</category>
      <author>lhprjj</author>
      <pubDate>Sat, 16 Sep 2023 12:42:06 +0000</pubDate>
    </item>
    <item>
      <title>XtractIM BGA建模提示failed to create ports</title>
      <link>https://bbs.eetop.wang/thread-951357-1-1.html</link>
      <description><![CDATA[求助：用xtractIM提取BGA model，提示failed to create ports, all the ground nets are open nets]]></description>
      <category>Sigrity仿真</category>
      <author>qingshuang</author>
      <pubDate>Sun, 25 Jun 2023 06:25:10 +0000</pubDate>
    </item>
    <item>
      <title>建模</title>
      <link>https://bbs.eetop.wang/thread-949449-1-1.html</link>
      <description><![CDATA[如图


补充内容 (2024-10-22 17:49):
T2B创建IBIS模型已搞定，感谢大家指点。]]></description>
      <category>Sigrity仿真</category>
      <author>lby18710901738</author>
      <pubDate>Fri, 19 May 2023 03:20:00 +0000</pubDate>
    </item>
    <item>
      <title>Sigrity Topology Workbench 2022 systemsi启动异常，求解决办法，谢谢</title>
      <link>https://bbs.eetop.wang/thread-945377-1-1.html</link>
      <description><![CDATA[]]></description>
      <category>Sigrity仿真</category>
      <author>tqwang</author>
      <pubDate>Mon, 13 Mar 2023 08:46:07 +0000</pubDate>
    </item>
    <item>
      <title>Cadence Design Systems Analysis Sigrity 2022.1 x64</title>
      <link>https://bbs.eetop.wang/thread-939014-1-1.html</link>
      <description><![CDATA[In the Readme file in the folder Crack is given.

https://downloadly.net/2020/14/4398/03/sigrity/12/?#/4398-cadence-042255114814.html]]></description>
      <category>Sigrity仿真</category>
      <author>xiexie57</author>
      <pubDate>Mon, 14 Nov 2022 01:34:01 +0000</pubDate>
    </item>
    <item>
      <title>Sigrity T2B使用求助！cir文件如何转化成IBIS？</title>
      <link>https://bbs.eetop.wang/thread-935123-1-1.html</link>
      <description><![CDATA[如题所示，在使用T2B过程中，只有cir文件，没有tutorial中显示的cnr等文件，如何处理？]]></description>
      <category>Sigrity仿真</category>
      <author>happy/ed</author>
      <pubDate>Thu, 08 Sep 2022 11:45:13 +0000</pubDate>
    </item>
    <item>
      <title>sigrity 2020或者2021的linux版本需求</title>
      <link>https://bbs.eetop.wang/thread-934187-1-1.html</link>
      <description><![CDATA[哪位大侠有sigrity的linux版本的安装包，帮扶分享一个，谢谢！
现在网上都是windows版本的，用不上。]]></description>
      <category>Sigrity仿真</category>
      <author>chenjunic</author>
      <pubDate>Tue, 23 Aug 2022 13:42:10 +0000</pubDate>
    </item>
    <item>
      <title>请教一下用T2B生成LVDS驱动器的IBIS文件的方法</title>
      <link>https://bbs.eetop.wang/thread-916079-1-1.html</link>
      <description><![CDATA[在run spice deck test过程中fail，虽然波形图出来，但Vocm明显不对。不知道在spice网表中是否需要连接外部的100欧姆的电阻（电路是true differential LVDS电路）。万分感谢！]]></description>
      <category>Sigrity仿真</category>
      <author>wshy</author>
      <pubDate>Wed, 03 Nov 2021 08:10:59 +0000</pubDate>
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