DDR3 Interface Timing Analysis

jonny2k · 发表于 2010-5-8 04:38:33

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Can anyone povide me some document about how to do DDR3 SDRAM Read/write timing? I am using Cadence Allegro SI. Thanks a lot !!!

Gnu_qin · 发表于 2010-7-24 00:49:44

me too

geoffreylee599 · 发表于 2010-8-1 18:13:51

i am confused by your description

pndc4089 · 发表于 2010-8-2 15:21:44

去jedec 找份specification 看看吧
还有就是你的memory controller 的spec.

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[求助] DDR3 Interface Timing Analysis