上海外资半导体公司内推机会.

haibing630

有兴趣的请把简历发到此邮箱: haibing630@gmail.com

内推机会,名额有限,不要犹豫.

verification and test engineer:

Responsibilities:

• Functional Bring-up, verification, validation and debug of any AC timing based FPGA/CPLD product.
• Interfacing with architecture, design, and pre-silicon verification teams in developing, modifying, and improving tests and set-up
• Develop and debug lab automation and flows to enable rapid validation of new products
• Evaluation of new products design functionality and performance to the target specification.
• Partnering with silicon architecture and Design Engineering to ensure device testability.
• Supporting internal and external customers on application issues for products released to production.

Qualifications:

• BS, MS or PhD in Electrical Engineering.
• IC Test Engineering in R&D environment, Verification Engineering, Application Engineering or related semiconductor R&D experiences.
• Understanding of AC timing test methodology and JEDEC standard.
• Lab experiences with high speed equipment, such as oscilloscope and pattern generator.
• Programming experience with Python, Perl, C, or C++
• Good data analyzing and documentation skill.
• Fluent verbal English.