ASIC/SOC DV intern

amdbbmm

                AMD Shanghaii s recruiting 1 DV intern now, please send me resume if any candidate to recommend. Good performers in interns will have chance to be converted to full-time employee.

JD: Design Verification Intern

working on Bus Interface and PCIe, responsible for IP/SOC level design verification;

Requirement:

1. familiar w/ ASIC design flow;

2. familiar w/ Verilog.

3. familiar w/ C++.

4. familiar w/ SystemVerilog.

5. familiar w/ Linux working environment.

6. familiar w/ OVM/UVM methodology will be a plus.

7. familiar w/ Perl/Tcl (Plus).

8. has implement a design on ASIC or FPGA and complete the verification independently (Plus).

9. be able to work more than 3 days one week.

Send resume to kurt.li@amd.com

       bilingal resume is preferred.

marktang

有人去吗,多少价钱