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需求专业 微电子,电子信息工程,计算机,软件工程及相关专业的2017届毕业的硕士、博士生投递。
投递方式: If you have interest , PLS send your update CV to job_china@cadence.com(简历投递格式:姓名+学校+申请职位+工作地点)
工作地点:上海
Job Description Summary We are searching for the talented product engineer to join the Cadence Stratus High Level Synthesis (HLS) team in China.
Job Description We are searching for the talented product engineer to join the Cadence Stratus High Level Synthesis (HLS) team in China. As part of our team you will support existing HLS customers, solve issues quickly for the customer’s on-going projects and new projects, work closely with R&D to improve Stratus HLS tool and HLS design methodology. Candidates must have a strong knowledge of C/C++, a background in RTL design and verification for ASIC or FPGA targets.
The Position Requirements are: Minimum BS or CS Strong knowledge of C/C++ Strong written and verbal communication skills Background in ASIC or FPGA design and verification.
Excellent problem solving ability |