icc lab4 2013sp2 按实验指南

randolpha

  ID                Occurrences        Title
  ---------------------------------------------------------------------------
  PSYN-1053        1                Old placer delay per length settings are used f...
  PSYN-1096        1                Placement includes scan chains but no scan DEF ...
  ---------------------------------------------------------------------------
118: Error: Placement includes scan chains but no scan DEF information. Aborting. Issue "man PSYN-1096" for information on avoiding this. (PSYN-1096)
119: Error: Old placer delay per length settings are used for creating placement  (PSYN-1053)
120:

128:    MSG ID  Incidents  Override code  Message
129:     -----  ---------  -------------  -------
130: PSYN-1096          2     2108303378  Scan chains not in scandef detected during placement.
131:                                      This can hurt clock speed and routability of your design because
132:                                      placement considers scan nets to be just like any other net.
133:                                      Suggestion:  make a scandef file and note all register pins
134:                                      involved in all scan chains.
135: PSYN-1053          1      511627419  Using old placer delay per length settings.
136:                                      This could hurt clock speed of your design because placer
137:                                      calculates wrong delays for wires.
138:                                      Suggestion:  use up-to-date method of specifying delay per unit length.
139:
实验指南有些问题:
比如
make restore_lab4
make load_placed
后让你查看active场景,实际有3个,但是指南上的答案是2个,还有一个leak.
上面的错误也是在这2个命令后查看相关日志发现的.

0417多音字

问个题外话，icc不是已经被淘汰了吗

randolpha

   

0417多音字 发表于 2021-1-28 09:27
问个题外话，icc不是已经被淘汰了吗

再淘汰它的物理实现的流程和知识还是存在的.淘汰的是表现形式,内在逻辑应该都在.
Warning: A non-unate path in clock network for clock 'SDRAM_CLK'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Warning: A non-unate path in clock network for clock 'SDRAM_CLK'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Warning: A non-unate path in clock network for clock 'ate_clk'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Warning: A non-unate path in clock network for clock 'ate_clk'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Information: Updating graph... (UID-83)
Warning: Design 'ORCA_TOP' contains 2 high-fanout nets. A fanout number of 1000 will be used for delay calculations involving these nets. (TIM-134)
Warning: A non-unate path in clock network for clock 'SDRAM_CLK'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Warning: A non-unate path in clock network for clock 'SDRAM_CLK'
from pin 'I_SDRAM_TOP/I_SDRAM_IF/sd_mux_dq_out_0/Y' is detected. (TIM-052)
Current scenario is: test_worst
Current scenario is: func_best
Current scenario is: test_best
Current scenario is: leak
No sources.
Error: Value for list 'object_list' must have 1 elements. (CMD-036)
set_active_scenarios $cur_active_scenarios
1
current_scenario $cur_scenario
Current scenario is: func_worst
func_worst
set_app_var compile_instance_name_prefix icc_place